Data processing systems which use virtual addressing in multiple virtual address spaces are well known and include systems such as, for instance, the IBM System/390 using MVS controlled programming. The organization and hardware/architectural aspects of the IBM System/390 are described in "IBM System/390 Principles of Operation," Form No. SA22-7201-00. The MVS system, as well as many other data processing systems, includes, for example, a central processing unit (CPU) and a main storage. The CPU contains the sequencing and processing facilities for instruction execution, interruption action, timing functions, initial program loading and other machine-related functions. The main storage is directly addressable and provides for high-speed processing of data by the CPU. The main storage may be either physically integrated with the CPU or constructed in stand-alone units.
With appropriate support by an operating system, a dynamic address translation facility may be used to provide to a user a system wherein storage appears to be larger than the main storage which is available in the configuration. This apparent main storage is referred to as virtual storage, and the addresses used to designate locations in the virtual storage are referred to as virtual addresses. The virtual storage of a user may far exceed the size of the main storage which is available in the configuration and normally is maintained in auxiliary storage. The virtual storage is considered to be composed of blocks of addresses, called pages. Only the most recently referred-to pages of the virtual storage are assigned to occupy blocks of physical main storage. As the user refers to pages that do not appear in main storage, they are brought in to replace pages in main storage that are less likely to be needed. The swapping of pages of storage may be performed by the operating system without assistance by the user program.
The sequence of virtual addresses associated with a virtual storage is called an address space. With appropriate support by an operating system, the dynamic address translation facility may be used to provide a number of address spaces. These address spaces may be used to provide a degree of isolation between users. Such support can consist of a completely different address space for each user, thus providing complete isolation, or a shared area may be provided by mapping a portion of each address space to a single common storage area. Also, instructions are provided which permit a semiprivileged program to access more than one such address space. Dynamic address translation provides for the translation of virtual addresses from multiple different address spaces without requiring that the translation parameters in the control registers be changed. These address spaces are called the primary address space, secondary address space, and AR-specified address spaces. A privileged program can access also the home address space through the use of the home address space control mode.
The primary address, secondary address, AR-specified address or home address is translated by means of a segment-table designation which at different times, is obtained from different control registers or specified by the access registers. The choice is determined by the translation mode specified in the current program-status word (PSW). Four translation modes are available: primary-space mode, secondary-space mode, access-register mode (AR-mode), and home-space mode. Different address spaces are addressable depending on the translation mode.
At any instant when the CPU is in the primary-space mode or secondary-space mode, the CPU can translate virtual addresses belonging to two address spaces--the primary address space and the secondary address space. At any instant when the CPU is in the access-register mode, it can translate virtual addresses of up to sixteen address spaces--the primary address space, the secondary address space and up to fourteen AR-specified address spaces. At any instant when the CPU is in the home-space mode, it can translate virtual addresses of the home address space.
The primary address space is identified as such because it consists of primary virtual addresses, which are translated by means of the primary segment-table designation. Similarly, the secondary address space consists of secondary virtual addresses translated by means of the secondary segment-table designation, the AR-specified address spaces consist of AR-specified virtual addresses translated by means of AR-specified segment-table designations, and the home address space consists of home virtual addresses translated by means of the home segment-table designation. The primary and secondary segment-table designations are in control registers 1 and 7, respectively. The AR-specified segment-table designations are in control registers 1 and 7 and in table entries called address space number (ASN)-second-table entries. The home segment-table designation is in control register 13.
The selected segment-table designation is used during dynamic address translation to locate a segment table, which is used in locating a page table. These tables, which reflect the current assignment of real storage, are used to translate virtual addresses into real addresses. The assignment of real storage occurs in units of pages, the real locations being assigned contiguously within a page. The pages need not be adjacent in real storage even though assigned to a set of sequential virtual addresses.
When data is transferred to and from, for example, a storage device, the real addresses of the main storage are used rather than the virtual addresses to access data. The data needs to be fixed in real storage for the duration of the transfer. In order to fix or lock the data, an operating system service provided by, for instance, the Real Storage Manager (RSM) of MVS, (which is responsible for managing all of the physical real storage) may, as an example, be used to pin the data in main storage for the duration of the data transfer. The Real Storage Manager requires that the address space containing the page of data to be transferred be locked so that no other service including one provided by a Real Storage Manager running on another central processing unit, is capable of changing the disposition of a page of data within the address space.
The cost of pinning a page of real storage using a service such as that provided by the Real Storage Manager is quite costly. For example, it costs at least 800 CPU cycles to fix a page of real storage the Real Storage Manager. This long pathlength causes performance degradation. In addition, performance is degradated when an entire address space is locked, since no other service capable of altering the disposition of a page is capable of being executed. This performance degradation is intensified in systems where multi-tasking occurs or large amounts of storage is required.
Therefore, a need exists for a locking mechanism which does not degrade system performance. A further need exists for a locking method and system which does not require an address space lock or address space serialization each time a page of real storage is pinned. A yet further need exists for a locking mechanism which decreases the pathlength for fixing a page of real storage.